1. Technical Field
A method for forming isolation films in semiconductor devices are disclosed, and more particularly, methods for forming isolation films in semiconductor devices are disclosed that are capable of preventing generation of undesirable moats and concentrations of electric fields at and on top corners of the isolation films that are formed by STI (shallow trench isolation) process.
2. Background of the Related Art
In general, the semiconductor substrate is divided into an active region where various semiconductor devices including transistors are formed, and an isolation region where an isolation film is located for electrically isolating the semiconductor devices of the active region.
A process of forming the isolation film includes a LOCOS (local oxidation) process, a PBL (poly buffered LOCOS) process and a STI (shallow trench isolation) process. The LOCOS process is one by which the pad oxide film and the pad nitride film are sequentially formed, the substrate of the isolation region is exposed by an etch process and the exposed region of the substrate is then oxidized by an oxidization process to form the isolation film. The PBL process is one of intervening a polysilicon film serving as a buffer between the pad oxide film of the LOCOS process and the pad nitride film. The STI process is one by which the pad oxide film and the pad nitride film are sequentially formed, the substrate of the isolation region is exposed by the etch process, the exposed region of the substrate is etched to form a trench and the trench is then buried with an insulating material to form the isolation film.
In the above, in the LOCOS process, a high temperature oxidization process is performed for a long period of time and a channel impediment ion implanted into the substrate is laterally diffused resulting in a “bird's beak” phenomena. As a result, the electrical characteristics of the device is degraded. Accordingly, the LOCOS process is not used for devices smaller than the 0.25 μm design rule.
In order to solve this problem of the LOCOS process, an isolation film may be formed using the STI process in the manufacture process of below the 0.25 μm design rule. In case where the isolation film is formed by the STI process, there are advantages that the bird's beak does not occur and the isolation characteristic is good.
However, there are problems in that the electrical characteristic of the device is degraded since an electric field is concentrated on the top corner and the bottom corner of the isolation film. Furthermore, as the design rule becomes small, there is a difficulty in burying the trench with an insulating material. Also, after an insulating material layer is formed on the entire structure in order to bury the trench with the insulating material, a polishing process such as a chemical mechanical polishing (CMP) process has to be performed in order to leave the insulating material only in the trench. Due to this, there are problems that the “Homp characteristic” is deteriorated and the uniformity of the substrate surface is degraded, since a moat structure is generated at the top corner of the isolation film.